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3a26aea082
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Tony Cao 3a26aea082 2kHz spin-lock mode: RTT halved to 2ms, per-byte XOR proof at 500us cycle 
- ticker: --spin mode polls FPRD until payload changes (phase-locks
  processing to TwinCAT frame arrival instead of free-running ticker),
  timeout at 1.5 periods keeps loop alive on master stop
- verified: 238k cycles, 0 errors, exec=245us (FPWR-bound),
  TwinCAT PLC task confirmed at 2000.8 Hz (all three tasks 0.5ms;
  base tick was already 50us - no base-time change needed)
- docs: 500us latency plan; scripts: task-rate ADS probe, 2kHz deploy,
  UI automation experiments (pywinauto) for task cycle inspection
2026-07-28 00:11:34 +08:00
..
1kb-verification-progress.md EL6695 8-byte bidirectional exchange with per-byte verification 2026-07-27 19:01:05 +08:00
8b-bridge-design.md EL6695 8-byte bidirectional exchange with per-byte verification 2026-07-27 19:01:05 +08:00
8b-test-report.md EL6695 8-byte bidirectional exchange with per-byte verification 2026-07-27 19:01:05 +08:00
8b-verification-methodology.md EL6695 8-byte bidirectional exchange with per-byte verification 2026-07-27 19:01:05 +08:00
500us-latency-plan.md 2kHz spin-lock mode: RTT halved to 2ms, per-byte XOR proof at 500us cycle 2026-07-28 00:11:34 +08:00
scope-waveform-design.md J1900 <-> TwinCAT 1 kHz verification over EL6695 bridge 2026-07-22 08:55:41 +08:00
verification-progress.md EL6695 secondary side: SAFEOP/OP bring-up + 1kHz data loop 2026-07-23 00:46:48 +08:00