- Fix SM ctrl bytes for SM2 (0x64) and SM3 (0x20) per ESI - Add SM2/SM3 register config + FMMU + PDO assignment via SDO - Change SM_TX_ADDR/RX_ADDR to SM2(0x1C00)/SM3(0x8E00) - Add ensure_od_secondary for PDO assignment - Add secondary-side diagnostics (CoE object probe) - Update SM2/SM3 enable/disable sequence for clean config - Add full bring-up sequence: INIT->PREOP->SAFEOP->OP |
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| .. | ||
| bin | ||
| bridge.rs | ||
| lib.rs | ||
| main.rs | ||
| regs.rs | ||
| rt.rs | ||
| stats.rs | ||